Implementing Parallelism in Random Discrete Event-Driven Simulation

The inherently sequential nature of random discrete eventdriven simulation has made parallel and distributed processing di cult. This paper presents a method of applying Recon gurable Logic to gain some parallelism in event generation. Field Programmable Gate Arrays (FPGAs) are used to create a exible and fast environment in which events may be generated according to various statistical models. The method presented accelerates both event generation and the elimination of some blocked events from the Event Queue.